makefile driver kernel out of src folder

alemoppo

alemoppo

Hello!

I would like to manage the source files in folders in the development of a kernel module.
I'm trying to run the makefile with this setup:

Code: 
- Makefile
+ src
    - mySrc.c
+ obj
+ bin
...

How can i build with this strucure? My makefile is actually (this run great in the same folder of the source file):
Code: 
SRCS=mySrc.c
KMOD=myModule

.include <bsd.kmod.mk>

How i can build the module with the folder structure?
I tried with:
Code: 
SRCS=src/mySrc.c
KMOD=myModule

.include <bsd.kmod.mk>
And make produces:
error: unable to open output file 'src/mySrc.o': 'No such file or directory'

I think i have to setup some variable (?) Where i can check this?

It would be nice also if the myModule.ko was moved in the bin folder and the objects in obj folder.

Thank you
Best regards.
 
Great!

With
Code: 
.PATH:  ${.CURDIR}/src
it take the ./src source and "magically" put the content in obj folder.

How can I setup also che obj folder? And how can I move the myModule.ko in bin folder? (I could do this with mv comman but there is probably a better way....).

Is there any documentation of these variables?

Thanks!
 
Thank you.

With:
Code: 
.OBJDIR: ${.CURDIR}/obj/mysubfolders
I can put all the object in the obj/mysubfolder.
Now I want to move the myModule.ko from obj/mysubfolder to bin/mysubfolder.
I can't find any variable to set where to put the .ko module.

I tried with the mv command:

Code: 
.OBJDIR: ${.CURDIR}/obj/mysubfolder
.PATH: ${.CURDIR}/src
SRCS=mySrc.c
KMOD=myModule

.include <bsd.kmod.mk>

        mv ${OBJDIR}/${KMOD}.ko ${.CURDIR}/bin/mysubfolder

But I get:
Code: 
Unassociated shell command "mv ${OBJDIR}/${KMOD}.ko ${.CURDIR}/bin/mysubfolder"
make: Fatal errors encountered -- cannot continue
 
Code: 
.SUFFIXES: .c.o
.OBJDIR = obj
.PATH: $(.CURDIR)/src
BINDIR=$(.CURDIR)/bin

OBJS = 1.o 2.o
.c.o:
        cc -c $(.IMPSRC)


all: $(BINDIR)/x
$(BINDIR)/x:    $(OBJS)
        cc $(OBJS) -o $(.TARGET)     


clean:
        rm -f *.o $(BINDIR)/*


$ls src
1.c 2.c

see

/usr/share/doc/psd/12.make/paper.ascii.gz
 
covacat said:
see

/usr/share/doc/psd/12.make/paper.ascii.gz
Click to expand...

I can't find the "psd" folder in /usr/share/doc

Currently my Makefile is:

Code: 
.SUFFIXES: .c.o
.OBJDIR = obj
.PATH: $(.CURDIR)/src
BINDIR=$(.CURDIR)/bin

OBJS = mySrc.c
.c.o:
        cc -c $(.IMPSRC)


all: $(BINDIR)/myKernel
$(BINDIR)/myKernel:    $(OBJS)
        cc $(OBJS) -o $(.TARGET)


clean:
        rm -f *.o $(BINDIR)/*

When i do make, i get:

<my path> # make
<my path>/Makefile" line 8: Missing dependency operator
<my path>/Makefile" line 13: Need an operator
<my path>/Makefile" line 17: Need an operator
Click to expand...
 
alemoppo said:
I can't find the "psd" folder in /usr/share/doc

Currently my Makefile is:

Code: 
.SUFFIXES: .c.o
.OBJDIR = obj
.PATH: $(.CURDIR)/src
BINDIR=$(.CURDIR)/bin

OBJS = mySrc.c
.c.o:
        cc -c $(.IMPSRC)


all: $(BINDIR)/myKernel
$(BINDIR)/myKernel:    $(OBJS)
        cc $(OBJS) -o $(.TARGET)


clean:
        rm -f *.o $(BINDIR)/*

When i do make, i have:
Click to expand...
use tab for indenting not spaces
 
Yes! Tab was an error.

I added also $(.PATH) to OBJS variable. So now I have:
Code: 
.SUFFIXES: .c.o
.OBJDIR = obj
.PATH: $(.CURDIR)/src
BINDIR=$(.CURDIR)/bin

OBJS = $(.PATH)/mySrc.c
.c.o:
        cc -c $(.IMPSRC)


all: $(BINDIR)/myKernel
$(BINDIR)/myKernel:    $(OBJS)
        cc $(OBJS) -o $(.TARGET)


clean:
        rm -f *.o $(BINDIR)/*

But now i got the errors for the internal dependencies, for example it doesn't recognise "d_open_t, d_close_t, ..., D_VERSION, uprintf, ... " (total of 12 warnings + 20 errors). Probably i have to modity the includes in .c file?
Code: 
#include <??/sys/xxx.h>
Or it's required someting defined in
Code: 
.include <bsd.kmod.mk>
?

(I followed example 1 here, i can compile without any problemi with the original makefile).

Thanks for the help!
 
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